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Posted on September 26, 2011 by  & 

Introduction of the Linear Plasma Etch Source

Wide Format Plasma Etching and Deposition Source Technology for Solar and Semiconductor Manufacturing

Flexible electronics is evolving to mean different things to different people. OLED displays with breathtaking resolution, RFID devices for tracking goods on plastic sheets, solar cells on thin metal substrates, just to name a few.
 
As the technology advances the need to build individual layers similar to semiconductor wafer processing will be needed. Impressive advances have been made using imprint technology that will drive down the cost of lithography for wide format processing. Once established, the need to etch or remove materials like dielectrics and metals will be required.
 
Today wet etching provides the least expensive method for most of these etches, however the environmental cost of disposal of the chemicals that are used, will necessitate a cross-over to plasma etching for most applications. The reasons from a technical standpoint, will have to do with controlling etched patterns to eliminate the undercutting that wet etches produce. Smaller, faster devices require smaller geometries, so shrinking devices are inevitable.

Evolution of Plasma Etching

Plasma etching of various metals and dielectrics has been used in the construction of semiconductor devices for a long time. Originally, the plasma field was generated in a large vacuum chamber and directed toward silicon wafers that were arranged in boats, to maximize the amount of wafers that could be processed at one time. This "Barrel Etcher" configuration was good for removing resist or surface treatment to enhance layer adhesion, but lacked good etch uniformity and suffered from slow etch rates.
 
 
The Barrel Plasma system gave way to single wafer etching, using diode or parallel plate configurations in the early 1980's. The advantages of single wafer etching soon became a standard in the industry for the etching of such films as silicon dioxide, silicon nitride, aluminum, and many other films used in the construction of IC's. Control of gas flow, chamber pressure and RF energy allowed for controlled removal of various films, while endpoint detection systems made possible the precise removal of films being etched. The obvious disadvantage of these single wafer etchers was the lack of volume through a particular process step. The single wafer etcher evolved into platforms that allowed multiple individual chambers to be configured onto a "Cluster Platform" for enhanced throughput. This type of reactor platform is in common use today at most leading manufacturer's fabs.
 
Solar cell manufacturing is evolving with new innovations to improve the overall efficiencies of each cell produced. Unlike semiconductor wafers, where many individual die or chips are produced on a single silicon wafer, making the wafer a very valuable commodity, solar cells are essentially one chip or device per wafer. This necessitates equipment and processes that have much higher throughputs and lower costs, just to be competitive. Equipment must make a paradigm leap in evolution from the single wafer approach, to something that can accommodate much greater productivity at the lowest possible cost to the solar cell manufacturers. This next generation plasma etcher requires innovation and new technology to meet these expectations.

Introduction of the Linear Plasma Etch Source

Etched In Time, Inc. (EITI) has developed a new type plasma reactor to fulfill these etching needs. In conjunction with FlexTech Alliance, EITI has completed the design, assembly, and testing phase of a contract to produce a wide format plasma etcher. An active source width of 370 mm was built to accommodate a 370 mm x 470 mm sized panel. The system is scalable to provide at least 2 meters of plasma etch width, with no changes to the original design. The etch module controls all operations of the plasma. Power for high and low frequency generators, gas flow for 5 mass flow controllers, pressure control via throttle valve, and computer operational control allows simple retrofitting to any number of OEM web based or Roll-to-Roll systems.
 
 
The concept for the Linear Plasma Etch Source consists of two parts. The first is a rectangular parallel plate diode system, similar to the single wafer etcher described previously. By designing in proper control of gas flow, pumping scheme, electrode spacing and other variables, a large active etch area can be utilized. An estimated area of 150 mm x 2000 mm will create a large surface area of plasma capable of etching up to (10) 7-1/2" x 7-1/2" solar cells at a time. Processes such as Texturizing, PSG Oxide etching, Silicon Nitride etching, or organic removal can be accomplished with this configuration.
 
Figure 1 - LPS 2500 DF Linear Source
 
The second part is to move the substrates horizontally under the linear source in a controlled fashion. This movement allows for superior etch uniformity of all the substrates along the length of the source.
 
Figure 2 shows a rendering of an automated etch system.
 
 
Figure 2
 
 
This type of Linear Plasma Etch Source for non-flexible silicon solar cells also lends itself to flexible substrates such as plastics or metal foils.
Figure 3 shows a Roll- to-Roll system that the LPS 2500 DF is being retrofitted into
 
 
Figure 3
 
This R2R system has three (3) distinct chambers which can accommodate multiple sources for higher throughput or different processes.
 
These types of substrates are commonly used in reactors that can process hundreds or thousands of feet of material at one time since they are processed as a roll. These Roll-to-Roll systems control the speed at which the film is advanced, which depending on the film being etched, determines the etch rate of that particular film. To increase throughput, multiple Linear Sources can be added to the system increasing the productivity of the system many fold.

Process Development

Process development was carried out using (2) 150 mm silicon wafers placed side by side on a moving electrode using thermal silicon dioxide grown in a furnace. Five different processes were developed to establish baselines for factors such as etch rate, uniformity, selectivity to underlying materials, and selectivity to standard positive photoresist.
 
 
Figure 4 shows graphs of SiO2 etch rate vs. uniformity for five different etch processes. Initial testing has shown that a 3% 1 sigma uniformity is readily obtainable.
 
 
Figure 4
 
Uniformity and etch rate were calculated using the following method:
Source width (150 mm) x Source length (370 mm) is the active area of the linear source. Silcon dioxide etch rate and uniformity are calculated for a stationary substrate over a period of 1 minute. Stated another way, a flexible substrate would travel 150 mm/minute under the linear source to remove approximately 5,000 angstroms of silicon dioxide. Other
films have much higher etch rates which increases the total area of the substrate being etched proportional to the higher etch rate obtained.
Figure 5 lists the final etch specifications for etching Silicon Dioxide on Silicon.
 
Process results-Linear Etcher
• High Speed Process (SF6+He)
• Rate: 5035 angstroms/min Uniformity 2.8% 1 sigma
• Medium Speed Process (SF6+He)
• Rate: 2917 angstroms/min: Uniformity 1.7% 1 sigma
• Low Speed Process (SF6+He)
• Rate: 1009 angstroms/min: Uniformity 1.9% 1 sigma
• High Selectivity Process (SF6+He+CHF3)
• Rate: 2022 angstroms/min: Uniformity 3.1% 1 sigma
• SiO2: Photoresist Selectivity: 3.5:1
• Sidewall slope: 82 degrees with no undercut of oxide
 
 
Figure 5

Conclusion

The object of this project was to build a new type plasma reactor capable of processing both flexible and non-flexible substrates. Feasibility
of a linear source for increased productivity of etch in manufacturing has been established.
 
Figure 6 is a SEM photo of a feature that has been processed through a photolithographic process and partially etched using the linear source to evaluate the plasma etch as compared to standard semiconductor plasma processing. Almost identical results confirm that this new technology can be used to make active circuits less expensively than current technologies.
 
 
Figure 6
 
 
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