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Printed Electronics USA 2014
Printed Electronics World

Printed oxide electronics at Oregon State University

ZoomPrinted oxide electronics at Oregon State University
Oregon State University has had a comprehensive program developing printed oxide electronics and electro-optics for some years. The latest progress was revealed by Douglas A. Keszler Department of Chemistry OSUMI Oregon State University at the IDTechEx Printed Electronics Europe event in Dresden Germany this month.
 
 
 
Collaboration and funding comes from Hewlett Packard, Inpria Corp., DARPA, The Air Force Research Laboratory, SNNI and Oregon Nanoscience and Microtechnologies Institute.
 
One advantage of this technology is transparency and three of the researchers have written a book on Transparent Electronics published by Springer. The electronic properties of inorganic compound layers can be superior to those of organic layers by a factor of ten or more, though the test devices reported here usually have mobilities similar to the best organic semiconductors not yet commercialised ie a few cm2/vs. With inorganic oxide transistor semiconductors and dielectrics, the challenge lies in printing what is, in effect, pottery and the OSU approach does not follow the usual route of creating fine powders in order to do this. So called subcolloidal precursor chemistries are used.
 
 
 
Serious challenges include getting the processing temperature down and the key parameters - such as transistor dielectric permittivity - up.
 
Examples are shown below.
 
 
InZnO and InGaZnO transistors have been studied, something that also interests Tokyo Institute of Technology working with Toppan Printing, for example. Inorganic compound semiconductors in transistors have also been studied by several institutes in Portugal, Korea etc and are being brought to market by companies such as 3T Technologies "The transparent electronics company" working with the Centre for Advanced Photonics and Electronics (CAPE) at Cambridge University in the UK. At OSU, electron beam and photo patterning down to feature sizes of 15 nm have been demonstrated. A typical test transistor with HafSOx dielectric is structured as shown below.
 
OSU conclude that Amorphous Oxide Semiconductors (AOS) are an attractive alternative to a-Si for TFT applications because of:
 
Improved performance
  • Greater device stability
  • Mobility: ˜10-30X > a-Si
  • Low threshold voltage
  • Transparency
AOS benefits in volume manufacturing
  • Solution processing: large area, low cost, smooth surfaces and interfaces
  • Direct patterning or additive deposition reduces lithography cost
  • Simpler device structure than a-Si: no source-drain doping
  • Non-toxic
The OSU path forward will be to use PIC as an enabling technology with low-temperature integration (T< 250ºC) with prompt dehydration. Precursors will be employed for compositional tuning of physical and chemical properties. Patterning will be by DLP, self-aligned photolithography and imprint. High-speed, robust sub 10-nm lithography will be introduced. Very high performance will be achieved through vertical integration and there will be in-house TFT display backplane development rather than chasing RFID as a first application.
 
 
If you were unable to attend Printed Electronics Europe 2008 then you can purchase the proceedings on line. Also read Inorganic Printed and
×Thin Film Electronics
Thin Film Electronics
is exhibiting at
Business and Technology Insight Forum
Tokyo, Japan
3 - 4 Sep 2014
Thin Film Electronics External Link.

Author

Dr Peter Harrop

Dr Peter Harrop

Dr Peter Harrop is the Founder and Chairman of IDTechEx.
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