Printed electronics is generally progressing in the sequence:
1. Hybrid circuits combining conventional components with printing, typically cost 10 cents to $30 to make. Examples include RFID inlay with printed antenna and silicon chip; calculator with printed membrane keyboard; heated apparel; ac electroluminescent displays (conventional drive circuit) and Toppan Forms' Audio Paper.
2. Products that are printed in several interconnected layers because printing all the components on top of each other is not yet possible, for example because they react, require special substrates. The different printing technologies cause damage or one component is destroyed by the annealing temperature of another on top or alongside. An example of several printed layers is the Duracell battery tester costing a few cents to make. This is unusual because there is no need to connect the thermochromic display to the heating elements.
Source: Holst Research Centre
3. Complete products printed on one layer, typically costing only 1-3 cents to make include the Estee Lauder/ Power Paper iontophoretic cosmetic delivery patch with printed battery, interconnect and electrodes and Kovio's ISO 14443 HF RFID inlay. It should also be easy to print most of the 12 billion Electronic Article Surveillance EAS labels sold every year because most take the form of an inductor and a capacitor working at an undemanding radio frequency. However, for most potentially printed products this is very difficult.
Today, most printed electronics are stuck at 1 but there is progress with the Plastic Logic electrophoretic displays with printed organic transistor drivers, though the e-reader logic is still conventional.
Kovio and PolyIC are moving rapidly to fully printed RFID tags. The prelonic technologies demonstrators of printed electronic novelties employ conventional LEDs but are otherwise printed. ACREO winking images employ printed batteries, interconnects, actuators and displays with a conventional chip, though they have a primitive printed transistor technology. However, Holst Research Centre is developing what it calls foil interconnect systems, which can connect many layers of, printed electronics on plastic film as an interim stage towards full integration of printed electronics. Mainly, this will be used where there is a cost advantage over hybrids containing conventional displays or silicon chips.
Now Dr Andreas Schaller of Technology Consulting Unternehmergesellschaft Andreas.Schaller@t-online.de has entered the debate by looking at the relative costings. He considered a credit card sized four layer sample product with greater than 100 micron feature size and:
- RF-Layer screen printed
- Logic-Layer gravure printed
- Sensor-Layer screen printed
His costing is:
Product Cost =
+ Conversion Cost + Structuring (Printing) - Gravure - Screen + Interconnect (Lamination) - Applying iNEMI PWB Calculation.
|Single sided||0.67||Double Sided||1|
|4 Layer Multilayer||1.75||6 Layer Multilayer||2.25|
|8 Layer Multilayer||3.0||10 Layer Multilayer||3.5|
|12 Layer Multilayer||4.25||14 Layer Multilayer||5.25|
|16 Layer Multilayer||6.5||16 Layer HDI with Micro Vias||10.60|
|16 Layer Sequential Multilayer||12.3||16 Layer Buildup with HDI||16.40|
Source: iNEMI Roadmap on INTERCONNECTION SUBSTRATES -ORGANIC
+ Bill of Material Cost
-Organic (low cost sensing) + Foils
Source: Technology Consulting Unternehmergesellschaft
His conclusions are:
- Select a 4 Layer (Antenna/RF/Logic/Sensor) test vehicle
- Applied iNEMIPWB method on printed "multi-layer" electronics
- Product Costs = Conversion (Printing, Lamination) + BOM (Ink, Foils)
- Cost Driver Overall = Inteconnect Cost
- Cost Driver Layer = Ink Costs for Logic Layer
- The evolution from a printed multi-layer foil system to a multi-printed layer system has up to ~1/3 product cost reduction potential (4-layer system).
Dr Andreas Schaller's "To Do List" includes:
- Increase the combination of different functions per layer
- Decrease the number of different printing techniques
- Develop low cost functional layer interconnect method
In other words, the interconnected, multiple-substrate approach comes at a severe cost penalty when compared to printing everything on one substrate (rarely possible as yet). However, it may be the only option for a large part of the potential market for printed electronics over the next five years as we replace conventional components with all-printed or more-printed structures. There are many reasons for abandoning conventional components, including silicon chips. They include cost, thickness, lack of mechanical flexibility, lack of optical transparency and environmental concerns. In a few cases, the printed components outperform conventional ones electronically.
Source top image: Robert Tarzwell. DMRPCB.COM.