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Posted on July 24, 2009 by  & 

Dip coated SWCNT for flexible electronics

Researchers at Northeastern University, Boston, US, recently demonstrated high-density single-walled carbon nanotube (SWCNT) networks in microscale structures on a wafer-level flexible substrate. The method using dip coating has huge potential in flexible electronics such as thin film transistors (TFTs), interconnects and various sorts of sensors.
 
The successful direct assembly of CNT structures with controllable dimensions using a dip coating process marks an enormous step towards the implementation of SWCNTs in microscale flexible electronics. To date, the complicated processing which often includes transfer printing represents a major technological barrier limiting the breakthrough of CNT electronics.
 
For practical applications in flexible and printed electronics an enhanced current drive is needed. As individual single-walled carbon nanotubes have only limited current-carrying capacity, a group, bundle or network of SWCNTs like the researchers at Northeastern University, Boston, used is required.
 
 
Utilizing a dip coating process, the researchers fabricated high density and uniform micropatterns of SWCNT networks onto a flexible parylene-C polymer substrate.
 
Parylene-C is lightweight and biocompatible, with high tensile strength (10.000 psi) and mechanical strength (Young's modulus of 400 kpsi). Due to its mechanical properties, parylene-C can be deposited at room temperature at very low thickness, i.e. down to 5 micron. Although hydrophobic in nature and cannot be easily changed using a chemical process, the low surface energy of the substrate makes a direct assembly difficult.
 
Employing a short O2 plasma treatment the researchers were able to modify the surface properties from hydrophobic to hydrophilic, which makes it comparatively easy for the SWCNT solution to assemble directly on the substrate. Key advantage of the polymer material is that the altered properties maintain for several days, which allows for an extended processing time.
 
After they deposited the polymer with a thickness of 10 micron onto silicon chips (15 mm x 15 mm) as a temporary carrier and surface pre-treatment, micro-channels were created using a spin coated photoresist followed by an optical lithography process. When dip coated (KSV Intruments) into a SWCNT solution obtained from Nantero Inc., the fluidic assembly took place.
 
 
Due to the altered surface properties of the polymer, single-walled carbon nanotube networks selectively assembled onto the substrate. Afterwards, the photoresist was removed leaving only the SWCNT arrays. Finally, the parylene-C film was peeled off from the temporary silicon carrier.
 
SEM micrographs of assembled SWNT structures on a soft polymer surface
(a) Patterned SWNT arrays on parylene-C substrate; (b) high magnification view of a typical central area; (c) SWNT micro-arrays that are 4 μm wide with 5 μm spacing; (d) SEM image of an interconnect device viewed at an oblique angle.
 
By combining a new processing technique of optical photolithography and dip coating, carbon nanotube network arrays with controllable dimensions were fabricated - producing electrically continuous CNT network micro-arrays as small as 4 micron wide and up to 1500 micron long.
 
Measured resistances of these test structures are significantly low (256 to 321 Ohm). Bending tests in both directions for up to 5 times have shown consistent results without deteriorating the structures, and a good stability of the assembled networks in microstructures.
 
Another advantage is the eliminated need for any printing, transfer or chemical functionalization technique. This bottom-up chemical-free patterning technology is versatile and scalable with direct applications in flexible electronics.
 
 
The research provides a framework for making low-cost, high performance, disposable, and flexible functional devices and sensors based on carbon nanotubes - suitable for large area applications.
 
The work was supported by the National Science Foundation Nanoscale Science and Engineering Center (NSEC) for High-rate Nanomanufacturing.
 
 
 
Top image: High density SWCNT structures on wafer-scale flexible substrate

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Technology Analyst

Posted on: July 24, 2009

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